早期,主板上存在北桥和南桥,用来建立各种外设和cpu的连接
北桥的作用是直接连接cpu和高速外设(显卡,内存等),南桥的作用是连接北桥和低速外设(硬盘,键盘,鼠标等)
FSB是南北桥架构的瓶颈
This structure is a typical North-South Bridge chip structure based on PCI bus. CPU and Northbridge chip are connected via FSB (Front Side Bus). The Northbridge chip is mainly responsible for controlling data exchange between CPU and high-speed devices (AGP graphics card, memory).
Then, Southbridge is connected to Northbridge via an internal bus (like Hub-Link). The Southbridge chip is mainly responsible for data exchange of low-speed devices like floppy drive, hard disk, keyboard, and add-in card.
后来,北桥从主板上“挪进”了cpu里——北桥被cpu集成了。这样一来,内存实现了直连cpu core。由于引脚的不同,不同core直连的内存可能是不同的,也就是说,对于每个core,它有近内存,也有远内存。这就引出了下文的numa
再后来,SoC(System on Chip),南桥北桥都集成在CPU中,单芯片解决方案。ATOM就是SoC
现代cpu基本架构
numa
如上架构是4路CPU,每路之间通过QPI相连,每个CPU内部8core用的是双Ring Bus相连,Memory Control Hub集成到了Die里面。一路CPU能连4个SMB,每个SMB有两个channel,每个channel最多接三个内存条(图中只画了2个)。每个core
快速通道互联[1][2](英语:Intel QuickPath Interconnect,缩写:QPI)[3][4],是一种由英特尔开发并使用的点对点处理器互联架构,用来实现CPU之间的互联。英特尔在2008年开始用QPI取代以往用于至强、安腾处理器的前端总线(FSB),用来实现芯片之间的直接互联,而不是再通过FSB连接到北桥。Intel于2017年发布的SkyLake-SP Xeon中,用UPI(UltraPath Interconnect)取代QPI
查看numa
[root@hhh64 ~]# numactl --hardware
available: 2 nodes (0-1)
node 0 cpus: 0 1 2 3 4 5 6 7 16 17 18 19 20 21 22 23
node 0 size: 63822 MB
node 0 free: 61842 MB
node 1 cpus: 8 9 10 11 12 13 14 15 24 25 26 27 28 29 30 31
node 1 size: 63996 MB
node 1 free: 61948 MB
node distances:
node 0 1
0: 10 21
1: 21 10
[root@TENCENT64 ~]#
参考:
https://plantegg.github.io/2021/06/01/CPU%E7%9A%84%E5%88%B6%E9%80%A0%E5%92%8C%E6%A6%82%E5%BF%B5/
https://www.partitionwizard.com/clone-disk/pci-vs-pcie.html
https://draveness.me/whys-the-design-numa-performance/